1. Field of the Invention
The present invention relates to an electrically programmable read only memory cell having an integrated circuit constituted by at least two semiconductor diodes to back-to-back arrangement.
2. Description of the Prior Art
Integrated semiconductor assemblies known as "read only memories" are known in the prior art having an XY matrix of line and column conductors, insulated from each other and at the intersections at which cells are connected each cell constituted by at least one semiconductor element, the impedance of the cell being capable of assuming two distinctly different values. Certain memories are programmable by the user, such that binary information can be inscribed from outside an envelope containing the memory, either by fusion of a fusible conductor, or by short-circuiting a junction, this modification of certain cells being selected according to a determined program.
Other devices are known comprising such cells and capable of being programmed, for example, decoding assemblies, logic devices for treating groups of information, often associated with memories. These devices will hereinafter also be designated by the generic term memories.
The cells may be constituted by arrangements of two diodes connected in series and in opposition. In this case the programming consists of short-circuiting one of the two diodes in the selected cells by destruction of the corresponding junction under a certain current density in the reverse direction, which density is determined by the surface area of the junction.
In the programmable memories known so far the diodes arranged back-to-back are diodes having a planar junction obtained by local diffusion of doping impurities in a surface region of a plane surface of a semiconductor slice. Attempts have been made to lower the value of the current level necessary for the destruction of the junction of the programmable diode, for the important voltage drops produced by a strong programming current are not compatible with the voltage levels admissible in the circuits, and for this purpose one tries to diminish the surface area of the junctions of the programmable diodes.
However, the techniques of localizing junctions impose minimum dimensions and it is not possible to reduce the area of the junction to be destroyed below a certain limit and thus the currents which are able to destroy the junction remain high. Currents of the order of 100 mA, for example, are necessary even when the breakdown voltage of the programmable diode is much lower than the breakdown voltage of the other diode, as is described in U.S. Pat. No. 3,641,516. The present technique of manufacturing integrated circuits does not permit reducing the areas of planar junctions and the current levels necessary for their destruction. Said currents remain too high whereas it should be possible to use currents of the order of 20 mA.